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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2015-10-14 10:46:36 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2015-10-14 10:46:36 +0200
commit13a3972585af60ec367d209cedbd3601e0c77467 (patch)
tree4b3312669b3e501f6bc10b39d8c7bbf516f07aac /arch/arm/include/asm/arch-tegra/clock.h
parent208bd51396fb606dbdcf45b064e6b372d7dd3e81 (diff)
parent297faccca2235e359012118495b9b73451d54bb9 (diff)
Merge remote-tracking branch 'u-boot/master'
Diffstat (limited to 'arch/arm/include/asm/arch-tegra/clock.h')
-rw-r--r--arch/arm/include/asm/arch-tegra/clock.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h
index d570d7f134..e56031d1af 100644
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -44,6 +44,9 @@ enum {
/* return the current oscillator clock frequency */
enum clock_osc_freq clock_get_osc_freq(void);
+/* return the clk_m frequency */
+unsigned int clk_m_get_rate(unsigned int parent_rate);
+
/**
* Start PLL using the provided configuration parameters.
*
@@ -338,8 +341,8 @@ void arch_timer_init(void);
void tegra30_set_up_pllp(void);
-/* Number of PLL-based clocks (i.e. not OSC or 32KHz) */
-#define CLOCK_ID_PLL_COUNT (CLOCK_ID_COUNT - 2)
+/* Number of PLL-based clocks (i.e. not OSC, MCLK or 32KHz) */
+#define CLOCK_ID_PLL_COUNT (CLOCK_ID_COUNT - 3)
struct clk_pll_info {
u32 m_shift:5; /* DIVM_SHIFT */