diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-03-25 01:18:22 +0100 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2017-04-01 15:45:04 -0700 |
| commit | 4119b7098c8ef83105946502bc7098dec67bd15d (patch) | |
| tree | 07a2386cf7bf20d8ac676f1eb5ebff87c8add303 /arch/arm/include/asm/arch-tegra/tegra_mmc.h | |
| parent | f38f5f4bcf8027041e8c5b9ea3bc1ae905510bc0 (diff) | |
mmc: tegra: allow disabling external clock loopback
Introduce CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK to disable the external clock
loopback and use the internal one on SDMMC3 as per the SDMMC_VENDOR_MISC_CNTRL_0
register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra/tegra_mmc.h')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/tegra_mmc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h index 64c848acb1..c40599ab19 100644 --- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h +++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h @@ -108,6 +108,8 @@ struct tegra_mmc { #define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_SHIFT 8 #define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_MASK (0xff << 8) +#define TEGRA_MMC_MISCON_ENABLE_EXT_LOOPBACK (1 << 17) + #define TEGRA_MMC_SWRST_SW_RESET_FOR_ALL (1 << 0) #define TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE (1 << 1) #define TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE (1 << 2) |