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author | Stefano Babic <sbabic@denx.de> | 2014-03-05 12:51:26 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2014-03-05 12:51:26 +0100 |
commit | 1ad6364eeb4f578e423081d1748e8a3fdf1ab01d (patch) | |
tree | f55731737edf1cfd653b21f2ff9d387e6c53ae24 /arch/arm/include/asm/arch-tegra124/sysctr.h | |
parent | 335143c76612a0ae26eef8abeda77641d4f63b50 (diff) | |
parent | cc07294bc704694ae33db75b25ac557e5917a83f (diff) |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/include/asm/arch-tegra124/sysctr.h')
-rw-r--r-- | arch/arm/include/asm/arch-tegra124/sysctr.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra124/sysctr.h b/arch/arm/include/asm/arch-tegra124/sysctr.h new file mode 100644 index 0000000000..3f0309b78f --- /dev/null +++ b/arch/arm/include/asm/arch-tegra124/sysctr.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2013 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _TEGRA124_SYSCTR_H_ +#define _TEGRA124_SYSCTR_H_ + +struct sysctr_ctlr { + u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */ + u32 cntsr; /* 0x04: SYSCTR0_CNTSR Counter Status */ + u32 cntcv0; /* 0x08: SYSCTR0_CNTCV0 Counter Count 31:00 */ + u32 cntcv1; /* 0x0C: SYSCTR0_CNTCV1 Counter Count 63:32 */ + u32 reserved1[4]; /* 0x10 - 0x1C */ + u32 cntfid0; /* 0x20: SYSCTR0_CNTFID0 Freq Table Entry */ + u32 cntfid1; /* 0x24: SYSCTR0_CNTFID1 Freq Table End */ + u32 reserved2[1002]; /* 0x28 - 0xFCC */ + u32 counterid[12]; /* 0xFD0 - 0xFxx CounterID regs, RO */ +}; + +#define TSC_CNTCR_ENABLE (1 << 0) /* Enable */ +#define TSC_CNTCR_HDBG (1 << 1) /* Halt on debug */ + +#endif /* _TEGRA124_SYSCTR_H_ */ |