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author | Vasily Khoruzhick <anarsoul@gmail.com> | 2018-05-14 13:49:53 -0700 |
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committer | Anatolij Gustschin <agust@denx.de> | 2018-05-15 08:03:42 +0200 |
commit | 1005e4e5f6b25c67064287268119e974c9cead22 (patch) | |
tree | 17329594e4f62b2ff0f1f4afc893897d73ace290 /arch/arm/include/asm/arch-tegra186 | |
parent | c7cb17e89295312263ec7904e32a118938c72d34 (diff) |
video: dw_hdmi: fix HSYNC and VSYNC polarity settings
Currently dw_hdmi configures HSYNC polarity using VSYNC setting from
EDID and vice versa. Fix it, since it breaks displays where HSYNC
and VSYNC polarity differs
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra186')
0 files changed, 0 insertions, 0 deletions