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authorPeng Fan <Peng.Fan@freescale.com>2015-07-21 16:15:21 +0800
committerScott Wood <scottwood@freescale.com>2015-08-25 22:53:59 -0500
commitecfb8768b16ebf6781ee0df45742674bda8a9543 (patch)
tree08ccaaa3bb470b0f6cc21c7b7f73d7e14cf82f9e /arch/arm/include/asm/arch-tegra20
parent63b29d80823be9ce7763cadc115012d0fba69700 (diff)
mtd: nand: mxs invalidate dcache before DMA read
Follow linux dma flow: Before DMA read, be sure to invalidate the cache over the address range of DMA buffer to prevent cache coherency problems. After DMA read, invalidate dcache again. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra20')
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