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| author | Tom Rini <trini@konsulko.com> | 2015-07-29 18:58:39 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-07-29 18:58:39 -0400 |
| commit | cc35734358540a1bbaf042fdf9f4cb2de17389ed (patch) | |
| tree | 95163aad5ff5430fdd6fb92c52f26eae46957c2c /arch/arm/include/asm/arch-tegra210/clock.h | |
| parent | 488d19cbcace0b87a2d08881eab7356088198903 (diff) | |
| parent | 873e3ef90ba98c764af6e05251354332205b9d3a (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Diffstat (limited to 'arch/arm/include/asm/arch-tegra210/clock.h')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra210/clock.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra210/clock.h b/arch/arm/include/asm/arch-tegra210/clock.h new file mode 100644 index 0000000000..3501be2abb --- /dev/null +++ b/arch/arm/include/asm/arch-tegra210/clock.h @@ -0,0 +1,27 @@ +/* + * (C) Copyright 2010-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* Tegra210 clock control definitions */ + +#ifndef _TEGRA210_CLOCK_H_ +#define _TEGRA210_CLOCK_H_ + +#include <asm/arch-tegra/clock.h> + +/* CLK_RST_CONTROLLER_OSC_CTRL_0 */ +#define OSC_FREQ_SHIFT 28 +#define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT) + +/* PLL bits that differ from generic clk_rst.h */ +#define PLLC_RESET 30 +#define PLLC_IDDQ 27 +#define PLLD_ENABLE_CLK 21 +#define PLLD_EN_LCKDET 28 + +int tegra_plle_enable(void); + +#endif /* _TEGRA210_CLOCK_H_ */ |