diff options
| author | Valentin-catalin Neacsu <valentin-catalin.neacsu@nxp.com> | 2019-02-13 09:14:53 +0000 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2019-05-08 17:27:00 -0500 |
| commit | c940646ed11ed6580a2b7749d05c873e39ad7f42 (patch) | |
| tree | b8cdd32368d624400f222102cab4f0e29790fd66 /arch/arm/include/asm/arch-tegra30/powergate.h | |
| parent | 05eb6a698acbd6465c032d39ea77b79f831f05af (diff) | |
net: phy: aquantia: Set only autoneg on in register 4.c441
For AQR405 in register 4.c441 bit 15 was override with 0. This caused the
phy to not negotiate at 2.5GB rate with mac. To avoid
this override it needed first to know the previous value of reg 4.c441
and set only bit 3.
Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra30/powergate.h')
0 files changed, 0 insertions, 0 deletions