diff options
| author | John Rigby <john.rigby@linaro.org> | 2011-04-19 10:42:40 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-06-01 19:22:41 +0200 |
| commit | be72e0c8c5f6a31198dbf076005dd7a6449aa418 (patch) | |
| tree | 643bed59b9155e63cd3305d1e5ef52d3bf0d0d62 /arch/arm/include/asm/arch-u8500/u8500.h | |
| parent | 92ff2d82b02f02544488bbaa631c96dff55303ff (diff) | |
armv7: Add ST-Ericsson u8500 arch
Based on ST-Ericsson internal git repo.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Albert Aribaud <albert.aribaud@free.fr>
Diffstat (limited to 'arch/arm/include/asm/arch-u8500/u8500.h')
| -rw-r--r-- | arch/arm/include/asm/arch-u8500/u8500.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-u8500/u8500.h b/arch/arm/include/asm/arch-u8500/u8500.h new file mode 100644 index 0000000000..0d6dbb7dbb --- /dev/null +++ b/arch/arm/include/asm/arch-u8500/u8500.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) ST-Ericsson SA 2009 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __U8500_H +#define __U8500_H + +/* + * base register values for U8500 + */ +#define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock + Management Unit */ +#define CFG_SDRAMC_BASE 0x903CF000 /* SDRAMC cnf registers */ +#define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */ + +/* + * U8500 GPIO register base for 9 banks + */ +#define U8500_GPIO_0_BASE 0x8012E000 +#define U8500_GPIO_1_BASE 0x8012E080 +#define U8500_GPIO_2_BASE 0x8000E000 +#define U8500_GPIO_3_BASE 0x8000E080 +#define U8500_GPIO_4_BASE 0x8000E100 +#define U8500_GPIO_5_BASE 0x8000E180 +#define U8500_GPIO_6_BASE 0x8011E000 +#define U8500_GPIO_7_BASE 0x8011E080 +#define U8500_GPIO_8_BASE 0xA03FE000 + +#endif /* __U8500_H */ |