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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2015-07-07 11:38:44 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2015-07-07 11:38:44 +0200
commit6f43ba70d15e15a08c25b3d956c70addb6740737 (patch)
treee5ddc8498043c0c47559737ea60e4d7fc866e20a /arch/arm/include/asm/arch-vf610/crm_regs.h
parent003b09dad492ebc385b28067b8028a0c0ff9323f (diff)
parent9c6b05cb724e18d1db3f9e1a75b2272572f06fbd (diff)
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm/include/asm/arch-vf610/crm_regs.h')
-rw-r--r--arch/arm/include/asm/arch-vf610/crm_regs.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-vf610/crm_regs.h b/arch/arm/include/asm/arch-vf610/crm_regs.h
index bc6db2a5a5..fdb45e9954 100644
--- a/arch/arm/include/asm/arch-vf610/crm_regs.h
+++ b/arch/arm/include/asm/arch-vf610/crm_regs.h
@@ -189,6 +189,8 @@ struct anadig_reg {
#define CCM_REG_CTRL_MASK 0xffffffff
#define CCM_CCGR0_UART0_CTRL_MASK (0x3 << 14)
#define CCM_CCGR0_UART1_CTRL_MASK (0x3 << 16)
+#define CCM_CCGR0_DSPI0_CTRL_MASK (0x3 << 24)
+#define CCM_CCGR0_DSPI1_CTRL_MASK (0x3 << 26)
#define CCM_CCGR1_USBC0_CTRL_MASK (0x3 << 8)
#define CCM_CCGR1_PIT_CTRL_MASK (0x3 << 14)
#define CCM_CCGR1_WDOGA5_CTRL_MASK (0x3 << 28)
@@ -206,6 +208,8 @@ struct anadig_reg {
#define CCM_CCGR4_GPC_CTRL_MASK (0x3 << 24)
#define CCM_CCGR4_I2C0_CTRL_MASK (0x3 << 12)
#define CCM_CCGR6_OCOTP_CTRL_MASK (0x3 << 10)
+#define CCM_CCGR6_DSPI2_CTRL_MASK (0x3 << 24)
+#define CCM_CCGR6_DSPI3_CTRL_MASK (0x3 << 26)
#define CCM_CCGR6_DDRMC_CTRL_MASK (0x3 << 28)
#define CCM_CCGR7_SDHC1_CTRL_MASK (0x3 << 4)
#define CCM_CCGR7_USBC1_CTRL_MASK (0x3 << 8)