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authorStefan Agner <stefan@agner.ch>2014-08-06 10:59:35 +0200
committerTom Rini <trini@ti.com>2014-08-30 07:46:39 -0400
commitbaa3134440fab74b0048c9cbb42b7e86f4687309 (patch)
treee0723057b5c6bd1d9cad7bee1e893ef4d74f53a8 /arch/arm/include/asm/imx-common/iomux-v3.h
parentaee63751d965329f74a1e8195ec8f0b39d5332f0 (diff)
arm: vf610: add NFC pin mux
Add pin mux for NAND Flash Controller (NFC). NAND can be connected using 8 or 16 data lines, this patch adds pin mux entries for all 16 data lines. Signed-off-by: Stefan Agner <stefan@agner.ch>
Diffstat (limited to 'arch/arm/include/asm/imx-common/iomux-v3.h')
-rw-r--r--arch/arm/include/asm/imx-common/iomux-v3.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h
index e91d4acb18..70ee86c432 100644
--- a/arch/arm/include/asm/imx-common/iomux-v3.h
+++ b/arch/arm/include/asm/imx-common/iomux-v3.h
@@ -123,6 +123,8 @@ typedef u64 iomux_v3_cfg_t;
#define PAD_CTL_SPEED_MED (1 << 12)
#define PAD_CTL_SPEED_HIGH (3 << 12)
+#define PAD_CTL_SRE (1 << 11)
+
#define PAD_CTL_DSE_150ohm (1 << 6)
#define PAD_CTL_DSE_50ohm (3 << 6)
#define PAD_CTL_DSE_25ohm (6 << 6)
@@ -135,6 +137,8 @@ typedef u64 iomux_v3_cfg_t;
#define PAD_CTL_PUE (1 << 2 | PAD_CTL_PKE)
#define PAD_CTL_OBE_IBE_ENABLE (3 << 0)
+#define PAD_CTL_OBE_ENABLE (1 << 1)
+#define PAD_CTL_IBE_ENABLE (1 << 0)
#else