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authorRan Wang <ran.wang_1@nxp.com>2019-11-26 11:40:40 +0800
committerPriyanka Jain <priyanka.jain@nxp.com>2019-12-26 16:00:20 +0530
commit0cfa00cdb94d5349e0d33fabe157caef667ab004 (patch)
tree97255f50eb303e1296f7f3a78c9b7fdf87ae702e /arch/arm/include/asm
parent055aa33ff9576490fe5d39e693bf3c3a4f8bcd08 (diff)
armv8: Add workaround for USB erratum A-050106
USB3.0 Receiver needs to enable fixed equalization for each of PHY instances in an SOC. This is similar to erratum A-009007, but this one is for LX2160A, and the register value is different. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index d46477d96e..7670b56c94 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -252,8 +252,14 @@
#define DCSR_USB_PHY_RX_OVRD_IN_HI 0x200C
#define USB_PHY_RX_EQ_VAL_1 0x0000
#define USB_PHY_RX_EQ_VAL_2 0x0080
+#if defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) || \
+ defined(CONFIG_ARCH_LS1028A)
#define USB_PHY_RX_EQ_VAL_3 0x0380
#define USB_PHY_RX_EQ_VAL_4 0x0b80
+#elif defined(CONFIG_ARCH_LX2160A)
+#define USB_PHY_RX_EQ_VAL_3 0x0080
+#define USB_PHY_RX_EQ_VAL_4 0x0880
+#endif
#define DCSR_USB_IOCR1 0x108004
#define DCSR_USB_PCSTXSWINGFULL 0x71