diff options
author | Kever Yang <kever.yang@rock-chips.com> | 2017-08-03 20:07:45 +0800 |
---|---|---|
committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-08-18 17:52:47 +0200 |
commit | a80b3b0378fdd700649124cb2f9cfe8c58390b73 (patch) | |
tree | 3e516955169519b63bf2579d427c76110c4f0846 /arch/arm/include/asm | |
parent | 44c5ba557bee98ec531715d3f04e9ede5599d18e (diff) |
rockchip: rk322x: update MACRO for mmc clksel reg
The description for eMMC/SDIO/SDMMC src is not correct,
update the CRU_CLKSEL11_CON value definition according to TRM.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru_rk322x.h | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h index 2a2f804f67..a7999ca5af 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h @@ -162,20 +162,17 @@ enum { /* CRU_CLKSEL11_CON */ EMMC_PLL_SHIFT = 12, EMMC_PLL_MASK = 3 << EMMC_PLL_SHIFT, - EMMC_SEL_APLL = 0, - EMMC_SEL_DPLL, + EMMC_SEL_CPLL = 0, EMMC_SEL_GPLL, EMMC_SEL_24M, SDIO_PLL_SHIFT = 10, SDIO_PLL_MASK = 3 << SDIO_PLL_SHIFT, - SDIO_SEL_APLL = 0, - SDIO_SEL_DPLL, + SDIO_SEL_CPLL = 0, SDIO_SEL_GPLL, SDIO_SEL_24M, MMC0_PLL_SHIFT = 8, MMC0_PLL_MASK = 3 << MMC0_PLL_SHIFT, - MMC0_SEL_APLL = 0, - MMC0_SEL_DPLL, + MMC0_SEL_CPLL = 0, MMC0_SEL_GPLL, MMC0_SEL_24M, MMC0_DIV_SHIFT = 0, |