Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.1

Zynq:
- Add support for Syzygy and cc108 boards
- Add support for mini u-boot configurations (cse)
- dts updates
- config/defconfig updates in connection to Kconfig changes
- Fix psu_init handling

ZynqMP:
- SPL fixes
- Remove slcr.c
- Fixing r5 startup sequence
- Add support for external pmufw
- Add support for new ZynqMP chips
- dts updates
- Add support for zcu102 rev1.0 board

Drivers:
- nand: Support external timing setting and board init
- ahci: Fix wording
- axi_emac: Wait for bit, non processor mode, readl/write conversion
- zynq_gem: Fix SGMII/PCS support

2 files changed, 6 insertions, 2 deletions

diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index cab29ba036..327046bf1b 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -21,6 +21,9 @@
 #define ZYNQMP_USB0_XHCI_BASEADDR	0xFE200000
 #define ZYNQMP_USB1_XHCI_BASEADDR	0xFE300000
 
+#define ZYNQMP_TCM_BASE_ADDR	0xFFE00000
+#define ZYNQMP_TCM_SIZE		0x40000
+
 #define ZYNQMP_CRL_APB_BASEADDR	0xFF5E0000
 #define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT	0x1000000
 #define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT	0
@@ -125,6 +128,8 @@ struct apu_regs {
 #define ZYNQMP_CSU_VERSION_VELOCE	0x2
 #define ZYNQMP_CSU_VERSION_QEMU		0x3
 
+#define ZYNQMP_CSU_VERSION_EMPTY_SHIFT		20
+
 #define ZYNQMP_SILICON_VER_MASK		0xF000
 #define ZYNQMP_SILICON_VER_SHIFT	12
 
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
index e52abd71a5..f256c7d4a9 100644
--- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -15,6 +15,7 @@
 enum {
 	IDCODE,
 	VERSION,
+	IDCODE2,
 };
 
 enum {
@@ -29,8 +30,6 @@ enum {
 	TCM_SPLIT,
 };
 
-int zynq_slcr_get_mio_pin_status(const char *periph);
-
 unsigned int zynqmp_get_silicon_version(void);
 
 void psu_init(void);