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authorStephen Warren <swarren@nvidia.com>2015-03-25 12:04:35 -0600
committerTom Warren <twarren@nvidia.com>2015-03-30 09:54:06 -0700
commitc21478bc6e527f57cb2e3251c7d6baa3e54514c2 (patch)
treeef8d9c8c7d617e5caa2a98342f7bca14201be6fa /arch/arm/include/asm
parent0edb3a8ec9a48725bf323e99b2167318fae4315a (diff)
ARM: tegra: pinctrl: minor cleanup
Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable declaration together with other pin/mux level definitions. Now the whole file is grouped/ordered pin/mux-related then drvgrp-related definitions. Fix typo in ifdef comment. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/arch-tegra/pinmux.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h b/arch/arm/include/asm/arch-tegra/pinmux.h
index 4212e57699..e3eb706fcb 100644
--- a/arch/arm/include/asm/arch-tegra/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra/pinmux.h
@@ -170,6 +170,16 @@ void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io);
void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
int len);
+struct pmux_pingrp_desc {
+ u8 funcs[4];
+#if defined(CONFIG_TEGRA20)
+ u8 ctl_id;
+ u8 pull_id;
+#endif /* CONFIG_TEGRA20 */
+};
+
+extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
+
#ifdef TEGRA_PMX_SOC_HAS_DRVGRPS
#define PMUX_SLWF_MIN 0
@@ -219,14 +229,4 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
#endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
-struct pmux_pingrp_desc {
- u8 funcs[4];
-#if defined(CONFIG_TEGRA20)
- u8 ctl_id;
- u8 pull_id;
-#endif /* CONFIG_TEGRA20 */
-};
-
-extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
-
#endif /* _TEGRA_PINMUX_H_ */