diff options
author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2019-08-02 20:40:09 +0530 |
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committer | Tom Rini <trini@konsulko.com> | 2019-08-11 16:43:41 -0400 |
commit | c62c7ef779cc145b9ee5c19486b4a3bf59ec1194 (patch) | |
tree | 04d006047010182a000e036811c05e7d2d5c83ff /arch/arm/include/asm | |
parent | 881b6324f01638505f3e9fd87fd1b49961d14a54 (diff) |
board: hisilicon: Add support for Hikey960 board
This commit adds board support for Hikey960 board from Hisilicon. This
board is one of the Consumer Edition boards of the 96Boards family
powered by Kirin960 SoC.
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/hikey960/
The initial supported/tested devices include:
- Debug serial
- SD
With these support, it's good enough for loading Linux Kernel from SD.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r-- | arch/arm/include/asm/arch-hi3660/hi3660.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-hi3660/hi3660.h b/arch/arm/include/asm/arch-hi3660/hi3660.h new file mode 100644 index 0000000000..3ca0951543 --- /dev/null +++ b/arch/arm/include/asm/arch-hi3660/hi3660.h @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2019 Linaro + * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + */ + +#ifndef __HI3660_H__ +#define __HI3660_H__ + +#define HI3660_UART6_BASE 0xfff32000 + +#define PMU_REG_BASE 0xfff34000 +#define PMIC_HARDWARE_CTRL0 (PMU_REG_BASE + (0x0C5 << 2)) + +#define SCTRL_REG_BASE 0xfff0a000 +#define SCTRL_SCFPLLCTRL0 (SCTRL_REG_BASE + 0x120) +#define SCTRL_SCFPLLCTRL0_FPLL0_EN BIT(0) + +#define CRG_REG_BASE 0xfff35000 +#define CRG_PEREN2 (CRG_REG_BASE + 0x020) +#define CRG_PERDIS2 (CRG_REG_BASE + 0x024) +#define CRG_PERCLKEN2 (CRG_REG_BASE + 0x028) +#define CRG_PERSTAT2 (CRG_REG_BASE + 0x02C) +#define CRG_PEREN4 (CRG_REG_BASE + 0x040) +#define CRG_PERDIS4 (CRG_REG_BASE + 0x044) +#define CRG_PERCLKEN4 (CRG_REG_BASE + 0x048) +#define CRG_PERSTAT4 (CRG_REG_BASE + 0x04C) +#define CRG_PERRSTEN2 (CRG_REG_BASE + 0x078) +#define CRG_PERRSTDIS2 (CRG_REG_BASE + 0x07C) +#define CRG_PERRSTSTAT2 (CRG_REG_BASE + 0x080) +#define CRG_PERRSTEN3 (CRG_REG_BASE + 0x084) +#define CRG_PERRSTDIS3 (CRG_REG_BASE + 0x088) +#define CRG_PERRSTSTAT3 (CRG_REG_BASE + 0x08C) +#define CRG_PERRSTEN4 (CRG_REG_BASE + 0x090) +#define CRG_PERRSTDIS4 (CRG_REG_BASE + 0x094) +#define CRG_PERRSTSTAT4 (CRG_REG_BASE + 0x098) +#define CRG_ISOEN (CRG_REG_BASE + 0x144) +#define CRG_ISODIS (CRG_REG_BASE + 0x148) +#define CRG_ISOSTAT (CRG_REG_BASE + 0x14C) + +#define PINMUX4_BASE 0xfff11000 +#define PINMUX4_SDDET (PINMUX4_BASE + 0x60) + +#define PINCONF3_BASE 0xff37e800 +#define PINCONF3_SDCLK (PINCONF3_BASE + 0x00) +#define PINCONF3_SDCMD (PINCONF3_BASE + 0x04) +#define PINCONF3_SDDATA0 (PINCONF3_BASE + 0x08) +#define PINCONF3_SDDATA1 (PINCONF3_BASE + 0x0c) +#define PINCONF3_SDDATA2 (PINCONF3_BASE + 0x10) +#define PINCONF3_SDDATA3 (PINCONF3_BASE + 0x14) + +#endif /*__HI3660_H__*/ |