armv8: layerscape: move ns_dev[] define from h to c file.

Move ns_dev[] from header file to C file to avoid compiling warning
when header file is included by others.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: rewrite commit message]
Reviewed-by: York Sun <york.sun@nxp.com>

2 files changed, 0 insertions, 164 deletions

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index 8ecff4d13f..2bbfab7388 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -87,84 +87,4 @@ enum csu_cslx_ind {
 	CSU_CSLX_DSCR = 121,
 };
 
-static struct csu_ns_dev ns_dev[] = {
-	 {CSU_CSLX_PCIE2_IO, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE1_IO, CSU_ALL_RW},
-	 {CSU_CSLX_MG2TPR_IP, CSU_ALL_RW},
-	 {CSU_CSLX_IFC_MEM, CSU_ALL_RW},
-	 {CSU_CSLX_OCRAM, CSU_ALL_RW},
-	 {CSU_CSLX_GIC, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE1, CSU_ALL_RW},
-	 {CSU_CSLX_OCRAM2, CSU_ALL_RW},
-	 {CSU_CSLX_QSPI_MEM, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE2, CSU_ALL_RW},
-	 {CSU_CSLX_SATA, CSU_ALL_RW},
-	 {CSU_CSLX_USB1, CSU_ALL_RW},
-	 {CSU_CSLX_QM_BM_SWPORTAL, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE3, CSU_ALL_RW},
-	 {CSU_CSLX_PCIE3_IO, CSU_ALL_RW},
-	 {CSU_CSLX_USB3, CSU_ALL_RW},
-	 {CSU_CSLX_USB2, CSU_ALL_RW},
-	 {CSU_CSLX_PFE, CSU_ALL_RW},
-	 {CSU_CSLX_SERDES, CSU_ALL_RW},
-	 {CSU_CSLX_QDMA, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART2, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART1, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART4, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART3, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART6, CSU_ALL_RW},
-	 {CSU_CSLX_LPUART5, CSU_ALL_RW},
-	 {CSU_CSLX_DSPI1, CSU_ALL_RW},
-	 {CSU_CSLX_QSPI, CSU_ALL_RW},
-	 {CSU_CSLX_ESDHC, CSU_ALL_RW},
-	 {CSU_CSLX_IFC, CSU_ALL_RW},
-	 {CSU_CSLX_I2C1, CSU_ALL_RW},
-	 {CSU_CSLX_I2C3, CSU_ALL_RW},
-	 {CSU_CSLX_I2C2, CSU_ALL_RW},
-	 {CSU_CSLX_DUART2, CSU_ALL_RW},
-	 {CSU_CSLX_DUART1, CSU_ALL_RW},
-	 {CSU_CSLX_WDT2, CSU_ALL_RW},
-	 {CSU_CSLX_WDT1, CSU_ALL_RW},
-	 {CSU_CSLX_EDMA, CSU_ALL_RW},
-	 {CSU_CSLX_SYS_CNT, CSU_ALL_RW},
-	 {CSU_CSLX_DMA_MUX2, CSU_ALL_RW},
-	 {CSU_CSLX_DMA_MUX1, CSU_ALL_RW},
-	 {CSU_CSLX_DDR, CSU_ALL_RW},
-	 {CSU_CSLX_QUICC, CSU_ALL_RW},
-	 {CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW},
-	 {CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW},
-	 {CSU_CSLX_SFP, CSU_ALL_RW},
-	 {CSU_CSLX_TMU, CSU_ALL_RW},
-	 {CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW},
-	 {CSU_CSLX_SCFG, CSU_ALL_RW},
-	 {CSU_CSLX_FM, CSU_ALL_RW},
-	 {CSU_CSLX_SEC5_5, CSU_ALL_RW},
-	 {CSU_CSLX_BM, CSU_ALL_RW},
-	 {CSU_CSLX_QM, CSU_ALL_RW},
-	 {CSU_CSLX_GPIO2, CSU_ALL_RW},
-	 {CSU_CSLX_GPIO1, CSU_ALL_RW},
-	 {CSU_CSLX_GPIO4, CSU_ALL_RW},
-	 {CSU_CSLX_GPIO3, CSU_ALL_RW},
-	 {CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW},
-	 {CSU_CSLX_CSU, CSU_ALL_RW},
-	 {CSU_CSLX_IIC4, CSU_ALL_RW},
-	 {CSU_CSLX_WDT4, CSU_ALL_RW},
-	 {CSU_CSLX_WDT3, CSU_ALL_RW},
-	 {CSU_CSLX_ESDHC2, CSU_ALL_RW},
-	 {CSU_CSLX_WDT5, CSU_ALL_RW},
-	 {CSU_CSLX_SAI2, CSU_ALL_RW},
-	 {CSU_CSLX_SAI1, CSU_ALL_RW},
-	 {CSU_CSLX_SAI4, CSU_ALL_RW},
-	 {CSU_CSLX_SAI3, CSU_ALL_RW},
-	 {CSU_CSLX_FTM2, CSU_ALL_RW},
-	 {CSU_CSLX_FTM1, CSU_ALL_RW},
-	 {CSU_CSLX_FTM4, CSU_ALL_RW},
-	 {CSU_CSLX_FTM3, CSU_ALL_RW},
-	 {CSU_CSLX_FTM6, CSU_ALL_RW},
-	 {CSU_CSLX_FTM5, CSU_ALL_RW},
-	 {CSU_CSLX_FTM8, CSU_ALL_RW},
-	 {CSU_CSLX_FTM7, CSU_ALL_RW},
-	 {CSU_CSLX_DSCR, CSU_ALL_RW},
-};
-
 #endif
diff --git a/arch/arm/include/asm/arch-ls102xa/ns_access.h b/arch/arm/include/asm/arch-ls102xa/ns_access.h
index f414b736d0..b6daf32e56 100644
--- a/arch/arm/include/asm/arch-ls102xa/ns_access.h
+++ b/arch/arm/include/asm/arch-ls102xa/ns_access.h
@@ -91,88 +91,4 @@ enum csu_cslx_ind {
 	CSU_CSLX_MAX,
 };
 
-static struct csu_ns_dev ns_dev[] = {
-	{ CSU_CSLX_PCIE2_IO, CSU_ALL_RW },
-	{ CSU_CSLX_PCIE1_IO, CSU_ALL_RW },
-	{ CSU_CSLX_MG2TPR_IP, CSU_ALL_RW },
-	{ CSU_CSLX_IFC_MEM, CSU_ALL_RW },
-	{ CSU_CSLX_OCRAM, CSU_ALL_RW },
-	{ CSU_CSLX_GIC, CSU_ALL_RW },
-	{ CSU_CSLX_PCIE1, CSU_ALL_RW },
-	{ CSU_CSLX_OCRAM2, CSU_ALL_RW },
-	{ CSU_CSLX_QSPI_MEM, CSU_ALL_RW },
-	{ CSU_CSLX_PCIE2, CSU_ALL_RW },
-	{ CSU_CSLX_SATA, CSU_ALL_RW },
-	{ CSU_CSLX_USB3, CSU_ALL_RW },
-	{ CSU_CSLX_SERDES, CSU_ALL_RW },
-	{ CSU_CSLX_QDMA, CSU_ALL_RW },
-	{ CSU_CSLX_LPUART2, CSU_ALL_RW },
-	{ CSU_CSLX_LPUART1, CSU_ALL_RW },
-	{ CSU_CSLX_LPUART4, CSU_ALL_RW },
-	{ CSU_CSLX_LPUART3, CSU_ALL_RW },
-	{ CSU_CSLX_LPUART6, CSU_ALL_RW },
-	{ CSU_CSLX_LPUART5, CSU_ALL_RW },
-	{ CSU_CSLX_DSPI2, CSU_ALL_RW },
-	{ CSU_CSLX_DSPI1, CSU_ALL_RW },
-	{ CSU_CSLX_QSPI, CSU_ALL_RW },
-	{ CSU_CSLX_ESDHC, CSU_ALL_RW },
-	{ CSU_CSLX_2D_ACE, CSU_ALL_RW },
-	{ CSU_CSLX_IFC, CSU_ALL_RW },
-	{ CSU_CSLX_I2C1, CSU_ALL_RW },
-	{ CSU_CSLX_USB2, CSU_ALL_RW },
-	{ CSU_CSLX_I2C3, CSU_ALL_RW },
-	{ CSU_CSLX_I2C2, CSU_ALL_RW },
-	{ CSU_CSLX_DUART2, CSU_ALL_RW },
-	{ CSU_CSLX_DUART1, CSU_ALL_RW },
-	{ CSU_CSLX_WDT2, CSU_ALL_RW },
-	{ CSU_CSLX_WDT1, CSU_ALL_RW },
-	{ CSU_CSLX_EDMA, CSU_ALL_RW },
-	{ CSU_CSLX_SYS_CNT, CSU_ALL_RW },
-	{ CSU_CSLX_DMA_MUX2, CSU_ALL_RW },
-	{ CSU_CSLX_DMA_MUX1, CSU_ALL_RW },
-	{ CSU_CSLX_DDR, CSU_ALL_RW },
-	{ CSU_CSLX_QUICC, CSU_ALL_RW },
-	{ CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW },
-	{ CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW },
-	{ CSU_CSLX_SFP, CSU_ALL_RW },
-	{ CSU_CSLX_TMU, CSU_ALL_RW },
-	{ CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW },
-	{ CSU_CSLX_RESERVED0, CSU_ALL_RW },
-	{ CSU_CSLX_ETSEC1, CSU_ALL_RW },
-	{ CSU_CSLX_SEC5_5, CSU_ALL_RW },
-	{ CSU_CSLX_ETSEC3, CSU_ALL_RW },
-	{ CSU_CSLX_ETSEC2, CSU_ALL_RW },
-	{ CSU_CSLX_GPIO2, CSU_ALL_RW },
-	{ CSU_CSLX_GPIO1, CSU_ALL_RW },
-	{ CSU_CSLX_GPIO4, CSU_ALL_RW },
-	{ CSU_CSLX_GPIO3, CSU_ALL_RW },
-	{ CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW },
-	{ CSU_CSLX_CSU, CSU_ALL_RW },
-	{ CSU_CSLX_ASRC, CSU_ALL_RW },
-	{ CSU_CSLX_SPDIF, CSU_ALL_RW },
-	{ CSU_CSLX_FLEXCAN2, CSU_ALL_RW },
-	{ CSU_CSLX_FLEXCAN1, CSU_ALL_RW },
-	{ CSU_CSLX_FLEXCAN4, CSU_ALL_RW },
-	{ CSU_CSLX_FLEXCAN3, CSU_ALL_RW },
-	{ CSU_CSLX_SAI2, CSU_ALL_RW },
-	{ CSU_CSLX_SAI1, CSU_ALL_RW },
-	{ CSU_CSLX_SAI4, CSU_ALL_RW },
-	{ CSU_CSLX_SAI3, CSU_ALL_RW },
-	{ CSU_CSLX_FTM2, CSU_ALL_RW },
-	{ CSU_CSLX_FTM1, CSU_ALL_RW },
-	{ CSU_CSLX_FTM4, CSU_ALL_RW },
-	{ CSU_CSLX_FTM3, CSU_ALL_RW },
-	{ CSU_CSLX_FTM6, CSU_ALL_RW },
-	{ CSU_CSLX_FTM5, CSU_ALL_RW },
-	{ CSU_CSLX_FTM8, CSU_ALL_RW },
-	{ CSU_CSLX_FTM7, CSU_ALL_RW },
-	{ CSU_CSLX_COP_DCSR, CSU_ALL_RW },
-	{ CSU_CSLX_EPU, CSU_ALL_RW },
-	{ CSU_CSLX_GDI, CSU_ALL_RW },
-	{ CSU_CSLX_DDI, CSU_ALL_RW },
-	{ CSU_CSLX_RESERVED1, CSU_ALL_RW },
-	{ CSU_CSLX_USB3_PHY, CSU_ALL_RW },
-	{ CSU_CSLX_RESERVED2, CSU_ALL_RW },
-};
-
 #endif