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authorVishnu Patekar <vishnupatekar0510@gmail.com>2016-01-12 01:20:59 +0800
committerHans de Goede <hdegoede@redhat.com>2016-01-26 16:20:05 +0100
commitf3ad64c88ccc3cd60d9d2d7b0098bf1692fda779 (patch)
tree732cb1bae97e03503b118dd722590f72ad1d7953 /arch/arm/include/asm
parentf5fd8caf7f0e5e0c6c09eb620fc4f7564290f27b (diff)
sunxi: Add support for LPDDR3 for A83T
Banana-pi M3 has LPDDR3 DRAM. this adds support for LPDDR3 for A83T. Mostly the timing parameters are different from DDR3. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h b/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h
index 05b6a89e8e..842ad3cc63 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h
@@ -198,6 +198,11 @@ struct sunxi_mctl_ctl_reg {
#define MCTL_MR2 0x18 /* CWL=8 */
#define MCTL_MR3 0x0
+#define MCTL_LPDDR3_MR0 0x0
+#define MCTL_LPDDR3_MR1 0xc3 /* twr=8, bl=8 */
+#define MCTL_LPDDR3_MR2 0xa /* RL=12, CWL=6 */
+#define MCTL_LPDDR3_MR3 0x0
+
#define DRAM_TYPE_DDR3 3
#define DRAM_TYPE_LPDDR3 7
#endif /* _SUNXI_DRAM_SUN8I_A83T_H */