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authorTom Rini <trini@konsulko.com>2015-10-15 17:45:39 -0400
committerTom Rini <trini@konsulko.com>2015-10-15 17:45:39 -0400
commit1275456d31cc130738775dca19b0a2ab1374cfbd (patch)
tree97652adb73378e3c2ecb34134aea32d75b0bad12 /arch/arm/include
parentaaf87f03ad709ff9f00819ef1eb001e878ad0a54 (diff)
parentb1964c72bdb9ca44de3a56d40927409b8cab2a76 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/armv8/mmu.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 0c928d40e7..587ee39909 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -103,13 +103,17 @@
#define TCR_EL2_IPS_BITS (3 << 16) /* 42 bits physical address */
#define TCR_EL3_IPS_BITS (3 << 16) /* 42 bits physical address */
-/* PTWs cacheable, inner/outer WBWA and non-shareable */
+/* PTWs cacheable, inner/outer WBWA and inner shareable */
#define TCR_FLAGS (TCR_TG0_64K | \
- TCR_SHARED_NON | \
+ TCR_SHARED_INNER | \
TCR_ORGN_WBWA | \
TCR_IRGN_WBWA | \
TCR_T0SZ(VA_BITS))
+#define TCR_EL1_RSVD (1 << 31)
+#define TCR_EL2_RSVD (1 << 31 | 1 << 23)
+#define TCR_EL3_RSVD (1 << 31 | 1 << 23)
+
#ifndef __ASSEMBLY__
void set_pgtable_section(u64 *page_table, u64 index,