diff options
author | Vasily Khoruzhick <anarsoul@gmail.com> | 2018-05-14 08:16:20 -0700 |
---|---|---|
committer | Anatolij Gustschin <agust@denx.de> | 2018-05-15 08:18:09 +0200 |
commit | 1c353aea2b3d36e59ae4b6af7cf2302d40ac96dd (patch) | |
tree | 4a731251be8fa26fd395631016a409c102a48842 /arch/arm/include | |
parent | 1005e4e5f6b25c67064287268119e974c9cead22 (diff) |
pwm: sunxi: add support for PWM found on Allwinner A64
This commit adds basic support for PWM found on Allwinner A64.
It can be used for pwm_backlight driver (e.g. for Pinebook)
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/gpio.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/pwm.h | 12 |
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index 3334fb51f0..e4fe54d8b8 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -172,6 +172,7 @@ enum sunxi_gpio_number { #define SUN8I_GPD_SDC1 3 #define SUNXI_GPD_LCD0 2 #define SUNXI_GPD_LVDS0 3 +#define SUNXI_GPD_PWM 2 #define SUN5I_GPE_SDC2 3 #define SUN8I_GPE_TWI2 3 diff --git a/arch/arm/include/asm/arch-sunxi/pwm.h b/arch/arm/include/asm/arch-sunxi/pwm.h index 47eb433fb6..dca283c7a9 100644 --- a/arch/arm/include/asm/arch-sunxi/pwm.h +++ b/arch/arm/include/asm/arch-sunxi/pwm.h @@ -10,8 +10,15 @@ #define SUNXI_PWM_CH0_PERIOD (SUNXI_PWM_BASE + 4) #define SUNXI_PWM_CTRL_PRESCALE0(x) ((x) & 0xf) +#define SUNXI_PWM_CTRL_PRESCALE0_MASK 0xf #define SUNXI_PWM_CTRL_ENABLE0 (0x5 << 4) #define SUNXI_PWM_CTRL_POLARITY0(x) ((x) << 5) +#define SUNXI_PWM_CTRL_CH0_ACT_STA BIT(5) +#define SUNXI_PWM_CTRL_CLK_GATE BIT(6) + +#define SUNXI_PWM_CH0_PERIOD_MAX (0xffff) +#define SUNXI_PWM_CH0_PERIOD_PRD(x) ((x & 0xffff) << 16) +#define SUNXI_PWM_CH0_PERIOD_DUTY(x) ((x) & 0xffff) #define SUNXI_PWM_PERIOD_80PCT 0x04af03c0 @@ -30,4 +37,9 @@ #define SUNXI_PWM_MUX SUN8I_GPH_PWM #endif +struct sunxi_pwm { + u32 ctrl; + u32 ch0_period; +}; + #endif |