diff options
| author | Ran Wang <ran.wang_1@nxp.com> | 2017-09-04 18:46:48 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-09-11 08:01:06 -0700 |
| commit | 2ab1553f08b1cb4a76764b1a67f75f77554860e3 (patch) | |
| tree | 7d97351a29a6626eedbf4dc141419676fcbd8710 /arch/arm/include | |
| parent | 9a609a88004e5be73d873e229f1b61bd52c749f7 (diff) | |
armv8: Add workaround for USB erratum A-009008
USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature
Optimal eye at TXREFTUNE value to 0x9 is observed, change
set the same value.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 |
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index f169724379..4e77102d06 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -337,6 +337,12 @@ struct ccsr_gur { #define SCFG_USBPWRFAULT_USB2_SHIFT 2 #define SCFG_USBPWRFAULT_USB1_SHIFT 0 +#define SCFG_BASE 0x01570000 +#define SCFG_USB3PRM1CR_USB1 0x070 +#define SCFG_USB3PRM1CR_USB2 0x07C +#define SCFG_USB3PRM1CR_USB3 0x088 +#define SCFG_USB_TXVREFTUNE 0x9 + #define SCFG_SNPCNFGCR_SECRDSNP 0x80000000 #define SCFG_SNPCNFGCR_SECWRSNP 0x40000000 #define SCFG_SNPCNFGCR_SATARDSNP 0x00800000 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index ffc5fa2636..6e4d243b07 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -133,6 +133,7 @@ #define SCFG_BASE 0x01fc0000 #define SCFG_USB3PRM1CR 0x000 #define SCFG_USB3PRM1CR_INIT 0x27672b2a +#define SCFG_USB_TXVREFTUNE 0x9 #define SCFG_QSPICLKCTLR 0x10 #define TP_ITYP_AV 0x00000001 /* Initiator available */ |