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authorAshish kumar <Ashish.kumar@nxp.com>2016-01-27 18:09:32 +0530
committerYork Sun <york.sun@nxp.com>2016-02-01 13:58:22 -0800
commit2ea3a448ccfdd3d6f7e01060ba8fa49bd97a73e0 (patch)
treea65ac9fd65e9e8eda89f146b7bd4ece4a992b40e /arch/arm/include
parent73a5de4c6ea5f0269013897654c7ff50da97323b (diff)
armv8: ls2080a: Implement workaround for core errata 829520, 833471
829520: Code bounded by indirect conditional branch might corrupt instruction stream. Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect Predictor. 833471: VMSR FPSCR functional failure or deadlock. Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/config.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index f1b164fd6a..3d8dac13d1 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -121,6 +121,10 @@
#define CONFIG_SYS_FSL_ERRATUM_A009663
#define CONFIG_SYS_FSL_ERRATUM_A009942
+/* ARM A57 CORE ERRATA */
+#define CONFIG_ARM_ERRATA_829520
+#define CONFIG_ARM_ERRATA_833471
+
#elif defined(CONFIG_LS1043A)
#define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_CACHELINE_SIZE 64