diff options
author | Yao Yuan <yao.yuan@freescale.com> | 2015-12-05 14:59:13 +0800 |
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committer | York Sun <yorksun@freescale.com> | 2015-12-15 08:57:32 +0800 |
commit | 6c4a1eba3fcc013f7d21cdb88098bdd3e7afa75b (patch) | |
tree | 7476f1c1c4ff8f69dd9d410eb4889a784fb3c6ef /arch/arm/include | |
parent | 0b8bc6314e1abc4379cc00f93f949257e0b1b196 (diff) |
armv7/fsl-ls102xa: Workaround for DDR erratum A008514
This is a workaround for hardware erratum.
Write the value of 63b2_0042h to EDDRTQCFG will optimal the
memory controller performance.
The value: 63b2_0042h comes from the hardware team.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index 931727275c..89339fe0ef 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -230,7 +230,7 @@ struct ccsr_scfg { u32 scfgrevcr; u32 coresrencr; u32 pex2pmrdsr; - u32 ddrc1cr; + u32 eddrtqcfg; u32 ddrc2cr; u32 ddrc3cr; u32 ddrc4cr; |