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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-09-03 14:01:02 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-09-03 14:01:02 +0200
commit6d4511b2c6734842de9de21c1bc0db4c3ea28b72 (patch)
treec676e6d3847b50f44f87afab50dc125fae6f1b84 /arch/arm/include
parentfb18fa95a14ae875ef0a5421cd9fecc00c7c3a4c (diff)
parent2d83d33a51926d6471eb9282d03d83783850d565 (diff)
Merge 'u-boot-microblaze/zynq' into (u-boot-arm/master'
Conflicts: arch/arm/include/asm/arch-zynq/hardware.h The conflict above was trivial and solved during merge.
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-zynq/hardware.h8
-rw-r--r--arch/arm/include/asm/arch-zynq/sys_proto.h1
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h
index 081624e201..cd69677729 100644
--- a/arch/arm/include/asm/arch-zynq/hardware.h
+++ b/arch/arm/include/asm/arch-zynq/hardware.h
@@ -19,6 +19,7 @@
#define ZYNQ_I2C_BASEADDR1 0xE0005000
#define ZYNQ_SPI_BASEADDR0 0xE0006000
#define ZYNQ_SPI_BASEADDR1 0xE0007000
+#define ZYNQ_DDRC_BASEADDR 0xF8006000
/* Reflect slcr offsets */
struct slcr_regs {
@@ -86,4 +87,11 @@ struct scu_regs {
#define scu_base ((struct scu_regs *)ZYNQ_SCU_BASEADDR)
+struct ddrc_regs {
+ u32 ddrc_ctrl; /* 0x0 */
+ u32 reserved[60];
+ u32 ecc_scrub; /* 0xF4 */
+};
+#define ddrc_base ((struct ddrc_regs *)ZYNQ_DDRC_BASEADDR)
+
#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/arch-zynq/sys_proto.h b/arch/arm/include/asm/arch-zynq/sys_proto.h
index 19a4eec6a9..110de90922 100644
--- a/arch/arm/include/asm/arch-zynq/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynq/sys_proto.h
@@ -14,6 +14,7 @@ extern void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk);
extern void zynq_slcr_devcfg_disable(void);
extern void zynq_slcr_devcfg_enable(void);
extern u32 zynq_slcr_get_idcode(void);
+extern void zynq_ddrc_init(void);
/* Driver extern functions */
extern int zynq_sdhci_init(u32 regbase);