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authorPaul Kocialkowski <contact@paulk.fr>2016-02-27 19:19:02 +0100
committerTom Rini <trini@konsulko.com>2016-03-15 15:12:50 -0400
commit6e495a453f2d59aa1ca92d1177957bfe5012bec0 (patch)
tree810e855edefa72dfec401862904144f3ad1763cd /arch/arm/include
parent5e56b0a80e0763fbc0f4bd14a622bcff973d7f00 (diff)
omap4: Properly enable USB PHY clocks
This correctly enables the USB PHY clocks, by enabling CM_ALWON_USBPHY_CLKCTRL and correctly setting CM_L3INIT_USBPHY_CLKCTRL's value. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-omap4/clock.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-omap4/clock.h b/arch/arm/include/asm/arch-omap4/clock.h
index f3a682a197..a408c0cd41 100644
--- a/arch/arm/include/asm/arch-omap4/clock.h
+++ b/arch/arm/include/asm/arch-omap4/clock.h
@@ -134,8 +134,11 @@
/* CM_DSS_DSS_CLKCTRL */
#define DSS_CLKCTRL_OPTFCLKEN_MASK 0xF00
+/* CM_COREAON_USB_PHY_CORE_CLKCTRL */
+#define USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8)
+
/* CM_L3INIT_USBPHY_CLKCTRL */
-#define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK 8
+#define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK (1 << 8)
/* CM_MPU_MPU_CLKCTRL */
#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24