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authorJean-Jacques Hiblot <jjhiblot@ti.com>2018-01-30 16:01:33 +0100
committerJaehoon Chung <jh80.chung@samsung.com>2018-02-19 16:58:54 +0900
commit8fc238bfada16d61dee4240de2d49f38a6a6f941 (patch)
tree479a95aaccb99e39504f864fe07e57778373253c /arch/arm/include
parentb59448170934094570a497ff7c5b4b2e94cff5a2 (diff)
mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
Use the timing parameter set in the MMC core to set the mode in UHSMS bit field. This is in preparation for adding HS200 support in omap hsmmc driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/omap_mmc.h12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h
index c4d326dfc1..507435a11f 100644
--- a/arch/arm/include/asm/omap_mmc.h
+++ b/arch/arm/include/asm/omap_mmc.h
@@ -53,7 +53,8 @@ struct hsmmc {
unsigned int sysctl; /* 0x12C */
unsigned int stat; /* 0x130 */
unsigned int ie; /* 0x134 */
- unsigned char res4[0x8];
+ unsigned char res4[0x4];
+ unsigned int ac12; /* 0x13C */
unsigned int capa; /* 0x140 */
unsigned char res5[0x10];
unsigned int admaes; /* 0x154 */
@@ -170,6 +171,15 @@ struct omap_hsmmc_plat {
#define IOV_3V0 3000000
#define IOV_1V8 1800000
+#define AC12_ET BIT(22)
+#define AC12_UHSMC_MASK (7 << 16)
+#define AC12_UHSMC_DDR50 (4 << 16)
+#define AC12_UHSMC_SDR104 (3 << 16)
+#define AC12_UHSMC_SDR50 (2 << 16)
+#define AC12_UHSMC_SDR25 (1 << 16)
+#define AC12_UHSMC_SDR12 (0 << 16)
+#define AC12_UHSMC_RES (0x7 << 16)
+
/* Driver definitions */
#define MMCSD_SECTOR_SIZE 512
#define MMC_CARD 0