summaryrefslogtreecommitdiff
path: root/arch/arm/include
diff options
context:
space:
mode:
authorStefan Agner <stefan.agner@toradex.com>2018-12-14 15:26:00 +0100
committerStefano Babic <sbabic@denx.de>2019-01-09 16:19:36 +0100
commita95d444055134fd8f0e1f2bd4c11222170fe6dc5 (patch)
tree734bcd08659f3e248da887c69d01eef19b8e1034 /arch/arm/include
parenta1f2779f5188280b1f131138c649354ec67ad12e (diff)
ARM: vf610: ddrmc: program Dummy DDRBYTE1/2
The Vybrid reference manual VFXXXRM Rev. 0 10/2016 states in chapter 5.2.6.1 DUMMY PADS (DDR/QuadSPI) that those pads need to be programed for correct operation of DDR. Assume the default DDR pin configuration which seems to work well on a Colibri VF50. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-vf610/iomux-vf610.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
index c0eeaa7e7d..01bc2998b8 100644
--- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h
+++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
@@ -244,6 +244,8 @@ enum {
VF610_PAD_DDR_WE__DDR_WE_B = IOMUX_PAD(0x02d0, 0x02d0, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
VF610_PAD_DDR_ODT1__DDR_ODT_0 = IOMUX_PAD(0x02d4, 0x02d4, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
VF610_PAD_DDR_ODT0__DDR_ODT_1 = IOMUX_PAD(0x02d8, 0x02d8, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+ VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1 = IOMUX_PAD(0x02dc, 0x02dc, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+ VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2 = IOMUX_PAD(0x02e0, 0x02e0, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
};
#endif /* __IOMUX_VF610_H__ */