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authorWolfgang Denk <wd@denx.de>2010-10-29 21:50:24 +0200
committerWolfgang Denk <wd@denx.de>2010-10-29 21:50:24 +0200
commitd75c2a3d7f34ff1eb9920ad72483cff7cb6d358f (patch)
tree2bf529f0ee08c530a46def3d6d4727ccdcaef236 /arch/arm/include
parent17dd883c5b76bdade0f7a48f2eb02d918a5ebef9 (diff)
parent1ab027cbf6536f40348699a7b7bfa8bbedf88c8e (diff)
Merge branch 'master' of git://git.denx.de/u-boot-imx
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-mx25/imx-regs.h14
-rw-r--r--arch/arm/include/asm/arch-mx5/imx-regs.h3
2 files changed, 10 insertions, 7 deletions
diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h
index f709bd8e0e..f5a2929e22 100644
--- a/arch/arm/include/asm/arch-mx25/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
@@ -108,11 +108,11 @@ struct gpt_regs {
/* Watchdog Timer (WDOG) registers */
struct wdog_regs {
- u32 wcr; /* Control */
- u32 wsr; /* Service */
- u32 wrsr; /* Reset Status */
- u32 wicr; /* Interrupt Control */
- u32 wmcr; /* Misc Control */
+ u16 wcr; /* Control */
+ u16 wsr; /* Service */
+ u16 wrsr; /* Reset Status */
+ u16 wicr; /* Interrupt Control */
+ u16 wmcr; /* Misc Control */
};
/* IIM control registers */
@@ -308,7 +308,9 @@ struct iim_regs {
#define GPT_CTRL_TEN 1 /* Timer enable */
/* WDOG enable */
-#define WCR_WDE 0x04
+#define WCR_WDE 0x04
+#define WSR_UNLOCK1 0x5555
+#define WSR_UNLOCK2 0xAAAA
/* FUSE bank offsets */
#define IIM0_MAC 0x1a
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 3ddda401f3..0b6249a9b8 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -26,7 +26,8 @@
/*
* IRAM
*/
-#define IRAM_BASE_ADDR 0x1FFE8000 /* internal ram */
+#define IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */
+#define IRAM_SIZE 0x00020000 /* 128 KB */
/*
* Graphics Memory of GPU
*/