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authorChen-Yu Tsai <wens@csie.org>2015-06-23 19:57:25 +0800
committerHans de Goede <hdegoede@redhat.com>2015-07-05 11:32:11 +0200
commite506889c9690b672a601ac84a31bb8dbc40d7e35 (patch)
treedf8c7297faa3552397ee941ddc8a8600a4527989 /arch/arm/include
parentdec7c84227339cda4bf6c7d9a411ea189473112d (diff)
sunxi: Add support for UART0 in PB pin group on A33
The A33 adds a pinmux function for UART0 in the PB pin group. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-sunxi/gpio.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 496295d357..8e67b3bcb8 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -156,6 +156,7 @@ enum sunxi_gpio_number {
#define SUN4I_GPB_UART0 2
#define SUN5I_GPB_UART0 2
#define SUN8I_GPB_UART2 2
+#define SUN8I_A33_GPB_UART0 3
#define SUNXI_GPC_SDC2 3
#define SUN6I_GPC_SDC3 4