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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-03-28 18:50:01 +0100
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-03-28 18:50:01 +0100
commit009d75ccc11d27b9a083375a88bb93cb746b4800 (patch)
tree12abe9fcf437d58b73ee1fa8d422548560deaae5 /arch/arm/lib
parent417c55803118eb8e350d5ab8ba6583fb39f4e2e3 (diff)
parentd53e340edf65ff253d3a7b06ebe60501045892e3 (diff)
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
Diffstat (limited to 'arch/arm/lib')
-rw-r--r--arch/arm/lib/cache-cp15.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index b6e5e95530..4abe1cf061 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -23,6 +23,8 @@
#include <common.h>
#include <asm/system.h>
+#include <asm/cache.h>
+#include <linux/compiler.h>
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
@@ -34,6 +36,10 @@ void __arm_init_before_mmu(void)
void arm_init_before_mmu(void)
__attribute__((weak, alias("__arm_init_before_mmu")));
+__weak void arm_init_domains(void)
+{
+}
+
static void cp_delay (void)
{
volatile int i;
@@ -77,7 +83,7 @@ void mmu_set_region_dcache_behaviour(u32 start, int size,
mmu_page_table_flush((u32)&page_table[start], (u32)&page_table[end]);
}
-static inline void dram_bank_mmu_setup(int bank)
+__weak void dram_bank_mmu_setup(int bank)
{
bd_t *bd = gd->bd;
int i;
@@ -115,6 +121,9 @@ static inline void mmu_setup(void)
/* Set the access control to all-supervisor */
asm volatile("mcr p15, 0, %0, c3, c0, 0"
: : "r" (~0));
+
+ arm_init_domains();
+
/* and enable the mmu */
reg = get_cr(); /* get control reg. */
cp_delay();