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authorAneesh V <aneesh@ti.com>2011-06-16 23:30:49 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-07-04 10:55:25 +0200
commitc2dd0d45540397704de9b13287417d21049d34c6 (patch)
tree1fa1e0a14c4061d1090596d227ea4f516d5e483a /arch/arm/lib
parente47f2db5371047eb9bcd115fee084e6a8a92a239 (diff)
armv7: integrate cache maintenance support
- Enable I-cache on bootup - Enable MMU and D-cache immediately after relocation - Do necessary initialization before enabling d-cache and MMU - Changes to cleanup_before_linux() - Make changes according to the new framework Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'arch/arm/lib')
-rw-r--r--arch/arm/lib/board.c6
-rw-r--r--arch/arm/lib/cache-cp15.c7
-rw-r--r--arch/arm/lib/cache.c5
3 files changed, 13 insertions, 5 deletions
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 4f88f5823b..fc52a26b79 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -450,6 +450,12 @@ void board_init_r (gd_t *id, ulong dest_addr)
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
monitor_flash_len = _end_ofs;
+ /*
+ * Enable D$:
+ * I$, if needed, must be already enabled in start.S
+ */
+ dcache_enable();
+
debug ("monitor flash len: %08lX\n", monitor_flash_len);
board_init(); /* Setup chipselects */
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index ba73fb925c..51831a96b5 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -34,6 +34,12 @@
DECLARE_GLOBAL_DATA_PTR;
+void __arm_init_before_mmu(void)
+{
+}
+void arm_init_before_mmu(void)
+ __attribute__((weak, alias("__arm_init_before_mmu")));
+
static void cp_delay (void)
{
volatile int i;
@@ -65,6 +71,7 @@ static inline void mmu_setup(void)
int i;
u32 reg;
+ arm_init_before_mmu();
/* Set up an identity-mapping for all 4GB, rw for everyone */
for (i = 0; i < 4096; i++)
page_table[i] = i << 20 | (3 << 10) | 0x12;
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 27123cd121..dc3242c90d 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -38,11 +38,6 @@ void __flush_cache(unsigned long start, unsigned long size)
/* disable write buffer as well (page 2-22) */
asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
#endif
-#ifdef CONFIG_OMAP34XX
- void v7_flush_cache_all(void);
-
- v7_flush_cache_all();
-#endif
return;
}
void flush_cache(unsigned long start, unsigned long size)