diff options
| author | maxims@google.com <maxims@google.com> | 2017-04-17 12:00:33 -0700 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-05-08 11:57:35 -0400 |
| commit | defb184904c05df8ca49bd0265969ce72cb92401 (patch) | |
| tree | 2ef2073c46d5a2fa68a512486d9f559d78bda6cd /arch/arm/mach-aspeed/ast2500 | |
| parent | 3b95902d47f89f95242ac143cd2a9ed1fd196157 (diff) | |
aspeed: Refactor SCU to use consistent mask & shift
Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-aspeed/ast2500')
| -rw-r--r-- | arch/arm/mach-aspeed/ast2500/sdram_ast2500.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c index efcf452b17..6383f727f2 100644 --- a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c +++ b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c @@ -183,9 +183,8 @@ static int ast2500_sdrammc_ddr4_calibrate_vref(struct dram_info *info) static size_t ast2500_sdrammc_get_vga_mem_size(struct dram_info *info) { size_t vga_mem_size_base = 8 * 1024 * 1024; - u32 vga_hwconf = (readl(&info->scu->hwstrap) - >> SCU_HWSTRAP_VGAMEM_SHIFT) - & SCU_HWSTRAP_VGAMEM_MASK; + u32 vga_hwconf = (readl(&info->scu->hwstrap) & SCU_HWSTRAP_VGAMEM_MASK) + >> SCU_HWSTRAP_VGAMEM_SHIFT; return vga_mem_size_base << vga_hwconf; } |