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author | Tom Rini <trini@konsulko.com> | 2019-03-19 07:14:37 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2019-04-12 08:05:55 -0400 |
commit | 9c4b0131d1d06dc87cecd08f065ec9b5c0f08b0f (patch) | |
tree | 2bc0d213b2173dccdc3356b7874672861da281cd /arch/arm/mach-aspeed | |
parent | 55f8b70fee856f7fc2ccf452e3533814e98a1ac6 (diff) |
ti: keystone2: Move CONFIG_ISW_ENTRY_ADDR to a common place
The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific
notion but rather "where is our previous stage loaded in memory?"
option. Make use of this on ARCH_KEYSTONE rather than SPL_TEXT_BASE for
our HS builds that are not using SPL anyhow.
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com?
Diffstat (limited to 'arch/arm/mach-aspeed')
0 files changed, 0 insertions, 0 deletions