diff options
| author | Wenyou Yang <wenyou.yang@atmel.com> | 2016-04-11 16:41:31 +0800 |
|---|---|---|
| committer | Andreas Bießmann <andreas@biessmann.org> | 2016-05-24 08:08:36 +0200 |
| commit | 4adf6a715796de4f0e858e0246c3abf5e3c118f3 (patch) | |
| tree | 7e92bdfef1df7c5cf29d973ca67e5d25765d28ff /arch/arm/mach-at91/armv7 | |
| parent | a9c89bf1669cbeb7bce6ae7a626eb9f2120af73f (diff) | |
ARM: at91: clock: fix the GCK's clock source
Before enabling a generated clock whose source is from the UPLL
clock, check and enable the UPLL clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Diffstat (limited to 'arch/arm/mach-at91/armv7')
| -rw-r--r-- | arch/arm/mach-at91/armv7/clock.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c index 81e9f69c94..27372b3f31 100644 --- a/arch/arm/mach-at91/armv7/clock.c +++ b/arch/arm/mach-at91/armv7/clock.c @@ -162,6 +162,11 @@ int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div) if (div > 0xff) return -EINVAL; + if (clk_source == GCK_CSS_UPLL_CLK) { + if (at91_upll_clk_enable()) + return -ENODEV; + } + writel(id, &pmc->pcr); regval = readl(&pmc->pcr); regval &= ~AT91_PMC_PCR_GCKCSS; |