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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2015-02-20 17:04:13 +0900
committerTom Rini <trini@ti.com>2015-02-21 08:23:52 -0500
commitaf9308276028924ff7f84770ddbd26bd7046d6c5 (patch)
tree55f2467ec5635acc83c97a92df33036f414d9f1f /arch/arm/mach-at91/include/mach/at91_gpbr.h
parent0e7368c6c4265c138293802b3315629338bc66d0 (diff)
ARM: at91: move SoC headers to mach-at91/include/mach
Move arch/arm/include/asm/arch-at91/* -> arch/arm/mach-at91/include/mach/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91_gpbr.h')
-rw-r--r--arch/arm/mach-at91/include/mach/at91_gpbr.h42
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91_gpbr.h b/arch/arm/mach-at91/include/mach/at91_gpbr.h
new file mode 100644
index 0000000000..e781481e88
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_gpbr.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2010
+ * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
+ *
+ * General Purpose Backup Registers
+ * Based on AT91SAM9XE datasheet
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef AT91_GPBR_H
+#define AT91_GPBR_H
+
+/*
+ * The Atmel AT91SAM9 series has a small resource of 4 nonvolatile
+ * 32 Bit registers (buffered by the Vbu power).
+ *
+ * Please consider carefully before using this resource for tasks
+ * that do not really need nonvolatile registers. Maybe you can
+ * store information in EEPROM or FLASH instead.
+ *
+ * However, if you use a GPBR please document its use here and
+ * reference the define in your code!
+ *
+ * known typical uses of the GPBRs:
+ * GPBR[0]: offset for RTT timekeeping (u-boot, kernel)
+ * GPBR[1]: unused
+ * GPBR[2]: unused
+ * GPBR[3]: bootcount (u-boot)
+ */
+#define AT91_GPBR_INDEX_TIMEOFF 0
+#define AT91_GPBR_INDEX_BOOTCOUNT 3
+
+#ifndef __ASSEMBLY__
+
+typedef struct at91_gpbr {
+ u32 reg[4];
+} at91_gpbr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif