diff options
| author | Wenyou Yang <wenyou.yang@atmel.com> | 2017-03-23 14:35:33 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2017-05-09 12:14:15 -0600 |
| commit | 0d00f9b6c136634e673a7412d99df68aaa6c9a6a (patch) | |
| tree | 15387f51a2c9b1c1ce43eabc390c8019765f6f38 /arch/arm/mach-at91/include/mach | |
| parent | 62904b7346e222208f31e330b2fa1f1deae8fbef (diff) | |
board: sama5d4ek: fix DD2 configuration
Fix the DDR2 configuration to make SPL work.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/atmel_mpddrc.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h index f6bcecda38..803501f5cf 100644 --- a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h +++ b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h @@ -186,9 +186,14 @@ int ddr3_init(const unsigned int base, #define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_73 0x6 #define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_110 0x7 -#define ATMEL_MPDDRC_IO_CALIBR_TZQIO 0x7f +#define ATMEL_MPDDRC_IO_CALIBR_TZQIO (0x7f << 8) #define ATMEL_MPDDRC_IO_CALIBR_TZQIO_(x) (((x) & 0x7f) << 8) +#define ATMEL_MPDDRC_IO_CALIBR_CALCODEP (0xf << 16) +#define ATMEL_MPDDRC_IO_CALIBR_CALCODEP_(x) (((x) & 0xf) << 16) +#define ATMEL_MPDDRC_IO_CALIBR_CALCODEN (0xf << 20) +#define ATMEL_MPDDRC_IO_CALIBR_CALCODEN_(x) (((x) & 0xf) << 20) + #define ATMEL_MPDDRC_IO_CALIBR_EN_CALIB (0x1 << 4) /* Bit field in Read Data Path Register */ |