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author | Pankit Garg <pankit.garg@nxp.com> | 2018-11-05 18:01:28 +0000 |
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committer | York Sun <york.sun@nxp.com> | 2018-12-06 14:37:19 -0800 |
commit | e3506480466084a09d9882d546c3c3c677b13962 (patch) | |
tree | d374b45dc79681b2a7068ca9ff74590292c1aedd /arch/arm/mach-bcmstb | |
parent | bb50569dc4c3ac71af075d5e994d0a37579efc51 (diff) |
armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3
Change tlb base address from OCRAM to DDR when exception level is
less than 3.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/mach-bcmstb')
0 files changed, 0 insertions, 0 deletions