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authorSimon Glass <sjg@chromium.org>2018-12-10 10:37:41 -0700
committerSimon Glass <sjg@chromium.org>2018-12-13 16:36:30 -0700
commit482e585bdf4a9eb1374d525ec4e57c671038d239 (patch)
tree792c9c6ede73da31693c8c929cc8a52ec998d3e9 /arch/arm/mach-exynos/include
parentcf9007ce88f412494d3b5438148d580c83f96685 (diff)
exynos: Add support for exynos5420 i2s pinmux
Allow setting the i2s pinmux correctly on exyno5420 so that i2c can be used on that SoC. Also rename EXYNOS_AUDSS to something consistent with other naming. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-exynos/include')
-rw-r--r--arch/arm/mach-exynos/include/mach/clock.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/clock.h b/arch/arm/mach-exynos/include/mach/clock.h
index edf62bdf85..e4c706adea 100644
--- a/arch/arm/mach-exynos/include/mach/clock.h
+++ b/arch/arm/mach-exynos/include/mach/clock.h
@@ -1370,10 +1370,13 @@ struct set_epll_con_val {
#define AUDIO_1_RATIO_MASK 0x0f
#define AUDIO0_SEL_MASK 0xf
+#define EXYNOS5420_AUDIO0_SEL_MASK (0x3 << 28)
#define AUDIO1_SEL_MASK 0xf
#define CLK_SRC_SCLK_EPLL 0x7
+#define EXYNOS5420_CLK_SRC_SCLK_EPLL (0x6 << 28)
#define CLK_SRC_MOUT_EPLL (1<<12)
+#define EXYNOS5420_CLK_SRC_MOUT_EPLL BIT(20)
#define AUDIO_CLKMUX_ASS (1<<0)
/* CON0 bit-fields */