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authorPeng Fan <peng.fan@nxp.com>2019-10-16 10:24:17 +0000
committerStefano Babic <sbabic@denx.de>2019-11-03 17:04:16 +0100
commit9e094455495081979cd20ac730a42508717e37b5 (patch)
tree9c3cababa92f3a8ede22f0ee8672021b222364ad /arch/arm/mach-imx/imx8m/clock_imx8mq.c
parentcde421cfc8f378fef9bd9b90e20c9633fe63d709 (diff)
imx8m: imx8mq: get chip rev for B1 revision
The i.MX8MQ B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id. It returns a magic number 0xff0055aa. update get_cpu_rev to support it, and enable ocotp clock to access ocotp. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx/imx8m/clock_imx8mq.c')
-rw-r--r--arch/arm/mach-imx/imx8m/clock_imx8mq.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
index feecdb50f6..5c3f780127 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
@@ -804,6 +804,7 @@ int clock_init(void)
init_wdog_clk();
clock_enable(CCGR_TSENSOR, 1);
+ clock_enable(CCGR_OCOTP, 1);
return 0;
}