diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2018-01-07 14:34:32 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2018-02-04 12:00:58 +0100 |
| commit | 4f0cd03723754746b6400c4279197cf18c9f0419 (patch) | |
| tree | 1464fd774f560486cf85cbee8b0bae9a728ef36b /arch/arm/mach-imx/mx7/psci-mx7.c | |
| parent | 169c20e903c85ca0e9b84dda2840b40c00916332 (diff) | |
imx: mx7: psci: add system power off support
Add i.MX7 PSCI system power off support, linux
kernel can use "poweroff" command to power off
system via SNVS, PMIC power will be disabled.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx/mx7/psci-mx7.c')
| -rw-r--r-- | arch/arm/mach-imx/mx7/psci-mx7.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mx7/psci-mx7.c b/arch/arm/mach-imx/mx7/psci-mx7.c index b26be89c78..d5db51165f 100644 --- a/arch/arm/mach-imx/mx7/psci-mx7.c +++ b/arch/arm/mach-imx/mx7/psci-mx7.c @@ -26,6 +26,12 @@ #define BP_SRC_A7RCR0_A7_CORE_RESET0 0 #define BP_SRC_A7RCR1_A7_CORE1_ENABLE 1 +#define SNVS_LPCR 0x38 +#define BP_SNVS_LPCR_DP_EN 0x20 +#define BP_SNVS_LPCR_TOP 0x40 + +#define CCM_CCGR_SNVS 0x4250 + #define CCM_ROOT_WDOG 0xbb80 #define CCM_CCGR_WDOG1 0x49c0 @@ -87,3 +93,15 @@ __secure void imx_system_reset(void) writel(0x3, CCM_BASE_ADDR + CCM_CCGR_WDOG1); writew(WCR_WDE, &wdog->wcr); } + +__secure void imx_system_off(void) +{ + u32 val; + + /* make sure SNVS clock is enabled */ + writel(0x3, CCM_BASE_ADDR + CCM_CCGR_SNVS); + + val = readl(SNVS_BASE_ADDR + SNVS_LPCR); + val |= BP_SNVS_LPCR_DP_EN | BP_SNVS_LPCR_TOP; + writel(val, SNVS_BASE_ADDR + SNVS_LPCR); +} |