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authorTom Rini <trini@konsulko.com>2019-06-11 13:41:24 -0400
committerTom Rini <trini@konsulko.com>2019-06-11 13:41:24 -0400
commit529faf80c339b78bd361b59735664f2605322b8e (patch)
tree2186ebe6f8f713d0dd497eb9d20c1a30e64105bb /arch/arm/mach-imx/mx7
parent68b90e57bc034e237923b02acb633dc4e91d44cb (diff)
parent23612534fe0fe426716ee9cb5cfeb74a456cb891 (diff)
Merge tag 'u-boot-imx-20190612' of git://git.denx.de/u-boot-imx
u-boot-imx-20190612 -------------------- - Board fixes: - imx6logic - wandboard - mx6sabre boots again - imx8qm_mek - pico-* boards - Toradex apalis / colibri - engicam imx6 (environment) - KP MX53 - opos6ul - Switch to DM: - vining2000 - dh MX6 - Toradex colibri i.MX7 - Novena - Security : fix CSF size for HAB - Other: - imx: fix building for i.mx8 without spl - pcie and switch to DM mx6sabreauto: Enable SPL SDP support
Diffstat (limited to 'arch/arm/mach-imx/mx7')
-rw-r--r--arch/arm/mach-imx/mx7/clock.c2
-rw-r--r--arch/arm/mach-imx/mx7/soc.c43
2 files changed, 29 insertions, 16 deletions
diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c
index 8cda71cf55..e364b162d9 100644
--- a/arch/arm/mach-imx/mx7/clock.c
+++ b/arch/arm/mach-imx/mx7/clock.c
@@ -53,7 +53,7 @@ static u32 get_ipg_clk(void)
u32 imx_get_uartclk(void)
{
- return get_root_clk(UART1_CLK_ROOT);
+ return get_root_clk(UART_CLK_ROOT);
}
u32 imx_get_fecclk(void)
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 4a914fca5e..1b4bbc5037 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -164,15 +164,6 @@ u32 __weak get_board_rev(void)
}
#endif
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-/* enable all periherial can be accessed in nosec mode */
-static void init_csu(void)
-{
- int i = 0;
- for (i = 0; i < CSU_NUM_REGS; i++)
- writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4);
-}
-
static void imx_enet_mdio_fixup(void)
{
struct iomuxc_gpr_base_regs *gpr_regs =
@@ -191,6 +182,26 @@ static void imx_enet_mdio_fixup(void)
}
}
+static void init_cpu_basic(void)
+{
+ imx_enet_mdio_fixup();
+
+#ifdef CONFIG_APBH_DMA
+ /* Start APBH DMA */
+ mxs_dma_init();
+#endif
+}
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+/* enable all periherial can be accessed in nosec mode */
+static void init_csu(void)
+{
+ int i = 0;
+
+ for (i = 0; i < CSU_NUM_REGS; i++)
+ writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4);
+}
+
static void imx_gpcv2_init(void)
{
u32 val, i;
@@ -269,12 +280,7 @@ int arch_cpu_init(void)
/* Disable PDE bit of WMCR register */
imx_wdog_disable_powerdown();
- imx_enet_mdio_fixup();
-
-#ifdef CONFIG_APBH_DMA
- /* Start APBH DMA */
- mxs_dma_init();
-#endif
+ init_cpu_basic();
#if CONFIG_IS_ENABLED(IMX_RDC)
isolate_resource();
@@ -286,6 +292,13 @@ int arch_cpu_init(void)
return 0;
}
+#else
+int arch_cpu_init(void)
+{
+ init_cpu_basic();
+
+ return 0;
+}
#endif
#ifdef CONFIG_ARCH_MISC_INIT