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authorPeng Fan <peng.fan@nxp.com>2018-01-10 13:20:22 +0800
committerStefano Babic <sbabic@denx.de>2018-02-04 12:00:58 +0100
commitbb0fabe42d67ee39f7a874a0e142bc35ed6226a4 (patch)
treedbc36687d503021b3773c097b0de59c7ed0beb70 /arch/arm/mach-imx/mx8m/Makefile
parent80fd219ec7e99e29ef00420c23c4881152698027 (diff)
imx: mx8m: add clock driver
Add clock driver to support i.MX8M. There are two kind PLLs, FRAC pll and SSCG pll. ROM already configured SYS PLL1/2, we only need to configure the output. ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/ enet clock are configured in the code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/mach-imx/mx8m/Makefile')
-rw-r--r--arch/arm/mach-imx/mx8m/Makefile7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mx8m/Makefile b/arch/arm/mach-imx/mx8m/Makefile
new file mode 100644
index 0000000000..05f38842f0
--- /dev/null
+++ b/arch/arm/mach-imx/mx8m/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += clock.o clock_slice.o