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authorJan Kiszka <jan.kiszka@siemens.com>2020-05-18 07:57:22 +0200
committerLokesh Vutla <lokeshvutla@ti.com>2020-05-19 14:41:13 +0530
commitc02712a7484918648e5dd09c092035c7eeb7794a (patch)
treec039b0a9f623eefc534fb3dbffceacee041d61a7 /arch/arm/mach-k3/j721e_init.c
parent6cfd09d4ed43ee401cc16f1dffabe7911b603380 (diff)
arm: mach-k3: Enable dcache in SPL
Add support for enabling dcache already in SPL. It accelerates the boot and resolves the risk to run into unaligned 64-bit accesses. Based on original patch by Lokesh Vulta. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/mach-k3/j721e_init.c')
-rw-r--r--arch/arm/mach-k3/j721e_init.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index 18a3c1c052..031279bc5b 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -221,6 +221,7 @@ void board_init_f(ulong dummy)
if (ret)
panic("DRAM init failed: %d\n", ret);
#endif
+ spl_enable_dcache();
}
u32 spl_mmc_boot_mode(const u32 boot_device)