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authorLokesh Vutla <lokeshvutla@ti.com>2019-10-07 13:52:17 +0530
committerTom Rini <trini@konsulko.com>2019-10-25 17:33:21 -0400
commite938b225213f7d2042b022b60dd3b24e6130f982 (patch)
tree265655bc7e6ae75234b6b40a9dfa04818f3e57db /arch/arm/mach-k3
parent683cdd6837e1be62be91a36937a6329b2ec6feb7 (diff)
arm: K3: Clean and invalidate Linux Image before jumping to Linux
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux by set/way in cleanup_before_linux(). Additionally there is a custom hook provided to clean and invalidate L3 cache. Unfortunately on K3 devices(having a coherent architecture), there is no easy way to quickly clean all the cache lines for L3. The entire address range needs to be cleaned and invalidated by Virtual Address. This can be implemented using the L3 custom hook but it take lot of time to clean the entire address range. In the interest of boot time this might not be a viable solution. The best hit is to make sure the loaded Linux image is flushed so that the entire image is written to DDR from L3. When Linux starts running with caches disabled the full image is available from DDR. Reported-by: Andrew F. Davis <afd@ti.com> Reported-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/mach-k3')
-rw-r--r--arch/arm/mach-k3/common.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index f8274b39d6..bf631b74f8 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -233,3 +233,14 @@ int print_cpuinfo(void)
return 0;
}
#endif
+
+#ifdef CONFIG_ARM64
+void board_prep_linux(bootm_headers_t *images)
+{
+ debug("Linux kernel Image start = 0x%lx end = 0x%lx\n",
+ images->os.start, images->os.end);
+ __asm_flush_dcache_range(images->os.start,
+ ROUND(images->os.end,
+ CONFIG_SYS_CACHELINE_SIZE));
+}
+#endif