diff options
| author | Tom Rini <trini@konsulko.com> | 2019-04-12 12:22:43 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-04-12 12:22:43 -0400 |
| commit | 40a9546c7b6217a78a3a010a0142529a837e46b6 (patch) | |
| tree | 87ef70a898d33b0f2b9194f3f96f1283a6325c16 /arch/arm/mach-keystone/include | |
| parent | 02f173ca156cee8526dff87603d5e446b443cde3 (diff) | |
| parent | d2c05f50e12f87128597a28146de7092aaa847c3 (diff) | |
Merge branch '2019-04-11-ti-master-imports'
- Improve Keystone 3 SoC support (DMA, TI SCI)
- Improve Keystone 2 SoC support (PHY fixes on various platforms)
- Improve am335x families (new platforms, more boot mode options in SPL
via DM).
- General DaVinci, OMAP5 fixes.
Diffstat (limited to 'arch/arm/mach-keystone/include')
| -rw-r--r-- | arch/arm/mach-keystone/include/mach/hardware-k2g.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-keystone/include/mach/mux-k2g.h | 5 |
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h b/arch/arm/mach-keystone/include/mach/hardware-k2g.h index 8b902641ec..971c081bb3 100644 --- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h +++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h @@ -69,9 +69,12 @@ #define K2G_GPIO0_BASE 0X02603000 #define K2G_GPIO1_BASE 0X0260a000 +#define K2G_GPIO0_BANK0_BASE K2G_GPIO0_BASE + 0x10 #define K2G_GPIO1_BANK2_BASE K2G_GPIO1_BASE + 0x38 #define K2G_GPIO_DIR_OFFSET 0x0 +#define K2G_GPIO_OUTDATA_OFFSET 0x4 #define K2G_GPIO_SETDATA_OFFSET 0x8 +#define K2G_GPIO_CLRDATA_OFFSET 0xC /* BOOTCFG RESETMUX8 */ #define KS2_RSTMUX8 (KS2_DEVICE_STATE_CTRL_BASE + 0x328) diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h b/arch/arm/mach-keystone/include/mach/mux-k2g.h index 809b72d5bf..67d47f8172 100644 --- a/arch/arm/mach-keystone/include/mach/mux-k2g.h +++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h @@ -27,6 +27,11 @@ #define PIN_PTU (1 << 17) /* pull up */ #define PIN_PTD (0 << 17) /* pull down */ +#define BUFFER_CLASS_B (0 << 19) +#define BUFFER_CLASS_C (1 << 19) +#define BUFFER_CLASS_D (2 << 19) +#define BUFFER_CLASS_E (3 << 19) + #define MODE(m) ((m) & 0x7) #define MAX_PIN_N 260 |