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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-02-02 21:11:29 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-02-14 16:36:13 +0900
commit4b50369fb53599aca34636d3a6f70117fe38bf07 (patch)
treef67f70566a3e1902dfe6ba477032a8e4121b0497 /arch/arm/mach-keystone
parent755c7d9a6179ffb15829da34cbc818d7fb4de558 (diff)
ARM: uniphier: create early page table at run-time
UniPhier SoCs are not equipped with dedicated on-chip SRAM. Instead, locked outer cache is used as RAM area during the early boot stage where DRAM is not ready yet. This effectively means MMU must be always enabled while we are in SPL. Currently, the SPL image for UniPhier SoCs contains the page table statically defined at compile time. It has been a burden because the 16KB page table occupies a quarter memory footprint of the 64KB SPL image. Finally, there is no more room to implement new features in SPL. Setting aside the NOR boot mode, this issue can be solved by creating the page table onto RAM at run time. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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