diff options
| author | Stefan Roese <sr@denx.de> | 2015-06-29 14:58:10 +0200 |
|---|---|---|
| committer | Luka Perkov <luka.perkov@sartura.hr> | 2015-07-10 14:54:09 +0200 |
| commit | 7f1adcd74f9d0dcff8759bd2262ad40c44e1a99d (patch) | |
| tree | efa357ca899bded65fbf30e11f16d798d5a78897 /arch/arm/mach-mvebu/cpu.c | |
| parent | 492d3223b076a9705b64897a061b60720f50d18b (diff) | |
arm: mvebu: Add SDIO/SDHCI support for Armada A38x
Armada A38x implements an SDHCI compatible SDIO controller. This patch
enables the Marvell driver to support this SoC. And enables the
SDIO controller if selected by the board configuration.
Tested on Marvell DB-88F6820-GP board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Diffstat (limited to 'arch/arm/mach-mvebu/cpu.c')
| -rw-r--r-- | arch/arm/mach-mvebu/cpu.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 0121db8bb5..531d0fb44c 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -10,6 +10,7 @@ #include <asm/pl310.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> +#include <sdhci.h> #define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3)) #define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3)) @@ -245,6 +246,16 @@ int cpu_eth_init(bd_t *bis) } #endif +#ifdef CONFIG_MV_SDHCI +int board_mmc_init(bd_t *bis) +{ + mv_sdh_init(MVEBU_SDIO_BASE, 0, 0, + SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD); + + return 0; +} +#endif + #ifndef CONFIG_SYS_DCACHE_OFF void enable_caches(void) { |