diff options
| author | Pragnesh Patel <pragnesh.patel@sifive.com> | 2020-05-29 11:33:32 +0530 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2020-06-04 09:44:09 +0800 |
| commit | 329e023868f28fd2cda31dc788017ef7c48fb1a8 (patch) | |
| tree | 82ee7dbb4ca86483275286099b026e7b7bf71d73 /arch/arm/mach-mvebu/dram.c | |
| parent | 1ba43d29eb626ee813650baf12a72a31ed2bffca (diff) | |
riscv: sifive: dts: fu540: set ethernet clock rate
Set ethernet clock rate to 125 Mhz so that it will work with 1000Mbps,
Earlier this is done by FSBL. With this change We can remove the
ethernet clock rate code from FSBL.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/arm/mach-mvebu/dram.c')
0 files changed, 0 insertions, 0 deletions