diff options
| author | Tom Rini <trini@konsulko.com> | 2016-04-04 13:15:23 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-04-04 13:15:23 -0400 |
| commit | 7e10a7c3bc382ff79bb6746944a0a4a0073a0faf (patch) | |
| tree | 9d2c995a9bc807922cbc6c7966eb98e652c9b99f /arch/arm/mach-mvebu/include | |
| parent | 30eae26b5629d6b06f11ca92c84ff30d57b784be (diff) | |
| parent | ebe7890321250352b812dbbf127a46ef58256d1c (diff) | |
Merge git://www.denx.de/git/u-boot-marvell
Diffstat (limited to 'arch/arm/mach-mvebu/include')
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/config.h | 5 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/cpu.h | 5 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/soc.h | 19 |
3 files changed, 27 insertions, 2 deletions
diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index cc1fc5f9d4..b8a8c62e81 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -17,7 +17,8 @@ #include <asm/arch/soc.h> -#if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_38X) +#if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \ + || defined(CONFIG_ARMADA_38X) /* * Set this for the common xor register definitions needed in dram.c * for A38x as well here. @@ -78,8 +79,10 @@ #ifdef CONFIG_CMD_NET #define CONFIG_CMD_MII #define CONFIG_MII /* expose smi ove miiphy interface */ +#if !defined(CONFIG_ARMADA_375) #define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ #define CONFIG_PHYLIB +#endif #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_PHY_GIGE /* GbE speed/duplex detect */ #define CONFIG_ARP_TIMEOUT 200 diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index dd58b4adc4..cbec876c42 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -61,6 +61,7 @@ enum cpu_attrib { enum { MVEBU_SOC_AXP, + MVEBU_SOC_A375, MVEBU_SOC_A38X, MVEBU_SOC_UNKNOWN, }; @@ -89,7 +90,11 @@ struct mbus_win { * Ref: Datasheet sec:A.28 */ struct mvebu_system_registers { +#if defined(CONFIG_ARMADA_375) + u8 pad1[0x54]; +#else u8 pad1[0x60]; +#endif u32 rstoutn_mask; /* 0x60 */ u32 sys_soft_rst; /* 0x64 */ }; diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index b317940366..a12be2a4d1 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -14,10 +14,14 @@ #define SOC_MV78230_ID 0x7823 #define SOC_MV78260_ID 0x7826 #define SOC_MV78460_ID 0x7846 +#define SOC_88F6720_ID 0x6720 #define SOC_88F6810_ID 0x6810 #define SOC_88F6820_ID 0x6820 #define SOC_88F6828_ID 0x6828 +/* A375 revisions */ +#define MV_88F67XX_A0_ID 0x3 + /* A38x revisions */ #define MV_88F68XX_Z1_ID 0x0 #define MV_88F68XX_A0_ID 0x4 @@ -106,7 +110,20 @@ #define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS) #define BOOTROM_ERR_MODE_UART 0x6 -#if defined(CONFIG_ARMADA_38X) +#if defined(CONFIG_ARMADA_375) +/* SAR values for Armada 375 */ +#define CONFIG_SAR_REG (MVEBU_REGISTER(0xe8200)) +#define CONFIG_SAR2_REG (MVEBU_REGISTER(0xe8204)) + +#define SAR_CPU_FREQ_OFFS 17 +#define SAR_CPU_FREQ_MASK (0x1f << SAR_CPU_FREQ_OFFS) + +#define BOOT_DEV_SEL_OFFS 3 +#define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) + +#define BOOT_FROM_UART 0x30 +#define BOOT_FROM_SPI 0x38 +#elif defined(CONFIG_ARMADA_38X) /* SAR values for Armada 38x */ #define CONFIG_SAR_REG (MVEBU_REGISTER(0x18600)) |