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authorChris Packham <judge.packham@gmail.com>2020-06-25 12:48:50 +1200
committerStefan Roese <sr@denx.de>2020-07-09 06:49:44 +0200
commitec9deec40032821a2ea17fbc503a48c6f8619589 (patch)
tree1be5cb0ec3bda1a5ea326c7abbbd822f75c65769 /arch/arm/mach-mvebu
parent485dbd3f1088c091c32138845f2f645d51d00667 (diff)
arm: mvebu: a38x: Fix typo
Fix spelling of Alignment. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/mach-mvebu')
-rw-r--r--arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
index 67a00cf1cf..d4480622c8 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
@@ -533,7 +533,7 @@ struct op_params pex_and_usb3_tx_config_params3[] = {
struct op_params pex_by4_config_params[] = {
/* unit_base_reg, unit_offset, mask, data, wait_time, num_of_loops */
{GLOBAL_CLK_SRC_HI, 0x800, 0x7, {0x5, 0x0, 0x0, 0x2}, 0, 0},
- /* Lane Alignement enable */
+ /* Lane Alignment enable */
{LANE_ALIGN_REG0, 0x800, 0x1000, {0x0, 0x0, 0x0, 0x0}, 0, 0},
/* Max PLL phy config */
{CALIBRATION_CTRL_REG, 0x800, 0x1000, {0x1000, 0x1000, 0x1000, 0x1000},