diff options
author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-20 17:04:07 +0900 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2015-02-21 08:23:51 -0500 |
commit | ef917ddb1d9240b075f3c03ddf6e246c89b86fa6 (patch) | |
tree | 52d222ac95f2042c025caa41bc710bc2ff137c33 /arch/arm/mach-nomadik/timer.c | |
parent | 56f86e39e80c5cbb17bec42cf6931cd203176830 (diff) |
ARM: nomadik: move SoC sources to mach-nomadik
Move
arch/arm/cpu/arm926ejs/nomadik/* -> arch/arm/mach-nomadik/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
Cc: Alessandro Rubini <rubini@unipv.it>
Diffstat (limited to 'arch/arm/mach-nomadik/timer.c')
-rw-r--r-- | arch/arm/mach-nomadik/timer.c | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/arch/arm/mach-nomadik/timer.c b/arch/arm/mach-nomadik/timer.c new file mode 100644 index 0000000000..775d0b7488 --- /dev/null +++ b/arch/arm/mach-nomadik/timer.c @@ -0,0 +1,71 @@ +/* + * (C) Copyright 2009 Alessandro Rubini + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/mtu.h> + +/* + * The timer is a decrementer, we'll left it free running at 2.4MHz. + * We have 2.4 ticks per microsecond and an overflow in almost 30min + */ +#define TIMER_CLOCK (24 * 100 * 1000) +#define COUNT_TO_USEC(x) ((x) * 5 / 12) /* overflows at 6min */ +#define USEC_TO_COUNT(x) ((x) * 12 / 5) /* overflows at 6min */ +#define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ) +#define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ) + +/* macro to read the decrementing 32 bit timer as an increasing count */ +#define READ_TIMER() (0 - readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0))) + +/* Configure a free-running, auto-wrap counter with no prescaler */ +int timer_init(void) +{ + ulong val; + + writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS, + CONFIG_SYS_TIMERBASE + MTU_CR(0)); + + /* Reset the timer */ + writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0)); + /* + * The load-register isn't really immediate: it changes on clock + * edges, so we must wait for our newly-written value to appear. + * Since we might miss reading 0, wait for any change in value. + */ + val = READ_TIMER(); + while (READ_TIMER() == val) + ; + + return 0; +} + +/* Return how many HZ passed since "base" */ +ulong get_timer(ulong base) +{ + return TICKS_TO_HZ(READ_TIMER()) - base; +} + +/* Delay x useconds */ +void __udelay(unsigned long usec) +{ + ulong ini, end; + + ini = READ_TIMER(); + end = ini + USEC_TO_COUNT(usec); + while ((signed)(end - READ_TIMER()) > 0) + ; +} + +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} |